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Searched refs:TRCSSCSRn (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/hwtracing/coresight/
Dcoresight-etm4x.h82 #define TRCSSCSRn(n) (0x2A0 + (n * 4)) macro
376 CASE_##op((val), TRCSSCSRn(0)) \
377 CASE_##op((val), TRCSSCSRn(1)) \
378 CASE_##op((val), TRCSSCSRn(2)) \
379 CASE_##op((val), TRCSSCSRn(3)) \
380 CASE_##op((val), TRCSSCSRn(4)) \
381 CASE_##op((val), TRCSSCSRn(5)) \
382 CASE_##op((val), TRCSSCSRn(6)) \
383 CASE_##op((val), TRCSSCSRn(7)) \
Dcoresight-etm4x-cfg.c89 CHECKREGIDX(TRCSSCSRn(0), ss_status, idx, off_mask); in etm4_cfg_map_reg_offset()
Dcoresight-etm4x-core.c448 etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); in etm4_enable_hw()
839 etm4x_relaxed_read32(csa, TRCSSCSRn(i)); in etm4_disable_hw()
1180 etm4x_relaxed_read32(csa, TRCSSCSRn(i)); in etm4_init_arch_data()
1635 state->trcsscsr[i] = etm4x_read32(csa, TRCSSCSRn(i)); in __etm4_cpu_save()
1764 etm4x_relaxed_write32(csa, state->trcsscsr[i], TRCSSCSRn(i)); in __etm4_cpu_restore()