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Searched refs:TRCSEQEVRn (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/drivers/hwtracing/coresight/
Dcoresight-cfg-afdo.c82 .offset = TRCSEQEVRn(0),
88 .offset = TRCSEQEVRn(1),
Dcoresight-etm4x-cfg.c76 } else if ((offset & GENMASK(11, 4)) == TRCSEQEVRn(0)) { in etm4_cfg_map_reg_offset()
Dcoresight-etm4x.h50 #define TRCSEQEVRn(n) (0x100 + (n * 4)) /* n = 0-2 */ macro
298 CASE_##op((val), TRCSEQEVRn(0)) \
299 CASE_##op((val), TRCSEQEVRn(1)) \
300 CASE_##op((val), TRCSEQEVRn(2)) \
Dcoresight-etm4x-core.c426 etm4x_relaxed_write32(csa, config->seq_ctrl[i], TRCSEQEVRn(i)); in etm4_enable_hw()
1618 state->trcseqevr[i] = etm4x_read32(csa, TRCSEQEVRn(i)); in __etm4_cpu_save()
1747 etm4x_relaxed_write32(csa, state->trcseqevr[i], TRCSEQEVRn(i)); in __etm4_cpu_restore()