Searched refs:TPC0_QM_GLBL_STS1_CQF_RD_ERR_MASK (Results 1 – 2 of 2) sorted by relevance
140 #define TPC0_QM_GLBL_STS1_CQF_RD_ERR_MASK 0x2 macro
136 #define TPC0_QM_GLBL_STS1_CQF_RD_ERR_MASK 0x2 macro