Searched refs:TPC0_QM_GLBL_STS1_CP_RD_ERR_MASK (Results 1 – 2 of 2) sorted by relevance
142 #define TPC0_QM_GLBL_STS1_CP_RD_ERR_MASK 0x4 macro
138 #define TPC0_QM_GLBL_STS1_CP_RD_ERR_MASK 0x4 macro