Searched refs:TEGRA30_I2S_TIMING (Results 1 – 2 of 2) sorted by relevance
16 #define TEGRA30_I2S_TIMING 0x4 macro
179 regmap_write(i2s->regmap, TEGRA30_I2S_TIMING, val); in tegra30_i2s_hw_params()341 case TEGRA30_I2S_TIMING: in tegra30_i2s_wr_rd_reg()