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Searched refs:TEGRA20_CLK_CDEV1 (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dtegra20-car.h116 #define TEGRA20_CLK_CDEV1 94 macro
/linux-5.19.10/arch/arm/boot/dts/
Dtegra20-plutux.dts59 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-tec.dts68 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-medcom-wide.dts94 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-trimslice.dts462 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-paz00.dts667 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-ventana.dts719 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-harmony.dts758 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-colibri.dtsi744 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-seaboard.dts917 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-asus-tf101.dts1194 <&tegra_car TEGRA20_CLK_CDEV1>;
Dtegra20-acer-a500-picasso.dts1041 <&tegra_car TEGRA20_CLK_CDEV1>;
/linux-5.19.10/drivers/clk/tegra/
Dclk-tegra20.c463 { .con_id = "cdev1", .dt_id = TEGRA20_CLK_CDEV1 },
831 clks[TEGRA20_CLK_CDEV1] = clk; in tegra20_periph_clk_init()
1102 if (clkspec->args[0] == TEGRA20_CLK_CDEV1 || in tegra20_clk_src_onecell_get()