Searched refs:TCR_EL1 (Results 1 – 8 of 8) sorted by relevance
| /linux-5.19.10/arch/arm64/kvm/hyp/include/hyp/ |
| D | sysreg-sr.h | 47 ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR); in __sysreg_save_el1_state()
103 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
110 write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) | in __sysreg_restore_el1_state()
151 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
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| /linux-5.19.10/arch/arm64/kvm/ |
| D | inject_fault.c | 90 if (vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) { in inject_abt32()
168 !(vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE)) in kvm_inject_size_fault()
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| D | sys_regs.c | 1606 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
2056 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
2058 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
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| /linux-5.19.10/arch/arm64/include/asm/ |
| D | kvm_host.h | 188 TCR_EL1, /* Translation Control Register */ enumerator
531 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
576 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
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| /linux-5.19.10/arch/arm64/kvm/hyp/nvhe/ |
| D | switch.c | 79 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __activate_traps()
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| /linux-5.19.10/Documentation/arm64/ |
| D | tagged-address-abi.rst | 16 On AArch64 the ``TCR_EL1.TBI0`` bit is set by default, allowing
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| /linux-5.19.10/Documentation/admin-guide/kdump/ |
| D | vmcoreinfo.rst | 486 TCR_EL1.T1SZ
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| /linux-5.19.10/arch/arm64/ |
| D | Kconfig | 1022 case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
1024 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1643 table entries. When enabled in TCR_EL1 (HA and HD bits) on
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