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Searched refs:TARGET_DEV5G (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main_regs.h31 TARGET_DEV5G = 102, enumerator
1981 #define DEV5G_MAC_ENA_CFG(t) __REG(TARGET_DEV5G, t, 13, 0, 0, 1, 60, 0, 0, 1, 4)
1996 #define DEV5G_MAC_MAXLEN_CFG(t) __REG(TARGET_DEV5G, t, 13, 0, 0, 1, 60, 8, 0, 1, 4)
2011 #define DEV5G_MAC_ADV_CHK_CFG(t) __REG(TARGET_DEV5G, t, 13, 0, 0, 1, 60, 28, 0, 1, 4)
2056 #define DEV5G_RX_SYMBOL_ERR_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 0, 0, 1, 4)
2059 #define DEV5G_RX_PAUSE_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 4, 0, 1, 4)
2062 #define DEV5G_RX_UNSUP_OPCODE_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 8, 0, 1, 4)
2065 #define DEV5G_RX_UC_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 12, 0, 1, 4)
2068 #define DEV5G_RX_MC_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 16, 0, 1, 4)
2071 #define DEV5G_RX_BC_CNT(t) __REG(TARGET_DEV5G, t, 13, 60, 0, 1, 312, 20, 0, 1, 4)
[all …]
Dsparx5_main.c58 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
61 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
64 { TARGET_DEV5G + 2, 0x10020000, 1 }, /* 0x610020000 */
67 { TARGET_DEV5G + 6, 0x1002c000, 1 }, /* 0x61002c000 */
70 { TARGET_DEV5G + 7, 0x10038000, 1 }, /* 0x610038000 */
73 { TARGET_DEV5G + 8, 0x10044000, 1 }, /* 0x610044000 */
76 { TARGET_DEV5G + 9, 0x10050000, 1 }, /* 0x610050000 */
79 { TARGET_DEV5G + 10, 0x1005c000, 1 }, /* 0x61005c000 */
82 { TARGET_DEV5G + 11, 0x10068000, 1 }, /* 0x610068000 */
127 { TARGET_DEV5G + 12, 0x10128000, 1 }, /* 0x610128000 */
[all …]
Dsparx5_port.h35 return TARGET_DEV5G; in sparx5_to_high_dev()