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Searched refs:SZ_4K (Results 1 – 25 of 275) sorted by relevance

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/linux-5.19.10/drivers/gpu/drm/etnaviv/
Detnaviv_iommu_v2.c56 dma_free_wc(context->global->dev, SZ_4K, in etnaviv_iommuv2_free()
61 dma_free_wc(context->global->dev, SZ_4K, v2_context->mtlb_cpu, in etnaviv_iommuv2_free()
76 dma_alloc_wc(v2_context->base.global->dev, SZ_4K, in etnaviv_iommuv2_ensure_stlb()
84 SZ_4K / sizeof(u32)); in etnaviv_iommuv2_ensure_stlb()
100 if (size != SZ_4K) in etnaviv_iommuv2_map()
127 if (size != SZ_4K) in etnaviv_iommuv2_unmap()
135 return SZ_4K; in etnaviv_iommuv2_unmap()
141 size_t dump_size = SZ_4K; in etnaviv_iommuv2_dump_size()
146 dump_size += SZ_4K; in etnaviv_iommuv2_dump_size()
156 memcpy(buf, v2_context->mtlb_cpu, SZ_4K); in etnaviv_iommuv2_dump()
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Detnaviv_iommu.c52 unsigned int index = (iova - GPU_MEM_START) / SZ_4K; in etnaviv_iommuv1_map()
54 if (size != SZ_4K) in etnaviv_iommuv1_map()
66 unsigned int index = (iova - GPU_MEM_START) / SZ_4K; in etnaviv_iommuv1_unmap()
68 if (size != SZ_4K) in etnaviv_iommuv1_unmap()
73 return SZ_4K; in etnaviv_iommuv1_unmap()
165 drm_mm_init(&context->mm, GPU_MEM_START, PT_ENTRIES * SZ_4K); in etnaviv_iommuv1_context_alloc()
/linux-5.19.10/fs/btrfs/tests/
Dextent-map-tests.c92 em->len = SZ_4K; in test_case_1()
94 em->block_len = SZ_4K; in test_case_1()
179 em->start = SZ_4K; in test_case_2()
180 em->len = SZ_4K; in test_case_2()
181 em->block_start = SZ_4K; in test_case_2()
182 em->block_len = SZ_4K; in test_case_2()
231 u64 len = SZ_4K; in __test_case_3()
241 em->start = SZ_4K; in __test_case_3()
242 em->len = SZ_4K; in __test_case_3()
243 em->block_start = SZ_4K; in __test_case_3()
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/linux-5.19.10/arch/arm/mach-tegra/
Diomap.h23 #define TEGRA_ARM_INT_DIST_SIZE SZ_4K
41 #define TEGRA_CLK_RESET_SIZE SZ_4K
50 #define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K
53 #define TEGRA_APB_MISC_SIZE SZ_4K
/linux-5.19.10/arch/arm64/kernel/
Dvmlinux.lds.S89 . = ALIGN(SZ_4K); \
340 ASSERT(__idmap_text_end - (__idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K,
343 ASSERT(__hibernate_exit_text_end - __hibernate_exit_text_start <= SZ_4K,
368 ASSERT(__relocate_new_kernel_end - __relocate_new_kernel_start <= SZ_4K,
370 ASSERT(KEXEC_CONTROL_PAGE_SIZE >= SZ_4K, "KEXEC_CONTROL_PAGE_SIZE is broken")
Dmodule-plts.c18 add = aarch64_insn_gen_add_sub_imm(reg, reg, dst % SZ_4K, in __get_adrp_add_pair()
53 p = ALIGN_DOWN((u64)a, SZ_4K); in plt_entries_equal()
54 q = ALIGN_DOWN((u64)b, SZ_4K); in plt_entries_equal()
236 if (min_align > SZ_4K) in count_plts()
251 ret += DIV_ROUND_UP(ret, (SZ_4K / sizeof(struct plt_entry))); in count_plts()
/linux-5.19.10/drivers/mtd/nand/raw/
Dnand_ids.c34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
43 SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
63 SZ_4K, SZ_1K, SZ_256K, 0, 5, 256, NAND_ECC_INFO(8, SZ_512)},
/linux-5.19.10/arch/arm64/crypto/
Dcrct10dif-ce-glue.c43 if (chunk > SZ_4K + CRC_T10DIF_PMULL_CHUNK_SIZE) in crct10dif_update_pmull_p8()
44 chunk = SZ_4K; in crct10dif_update_pmull_p8()
68 if (chunk > SZ_4K + CRC_T10DIF_PMULL_CHUNK_SIZE) in crct10dif_update_pmull_p64()
69 chunk = SZ_4K; in crct10dif_update_pmull_p64()
/linux-5.19.10/arch/arm/mach-davinci/
Ddevices.c124 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
154 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
214 SZ_4K - 1; in davinci_setup_mmc()
226 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; in davinci_setup_mmc()
238 SZ_4K - 1; in davinci_setup_mmc()
Ddevices-da8xx.c301 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
321 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
357 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
423 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
669 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
698 .end = DA8XX_GPIO_BASE + SZ_4K - 1,
764 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
791 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
938 .end = DA8XX_RTC_BASE + SZ_4K - 1,
1011 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
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Dpm.c133 pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); in davinci_pm_init()
137 pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); in davinci_pm_init()
143 pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); in davinci_pm_init()
/linux-5.19.10/arch/arm/mach-s3c/
Ddevs.c192 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
222 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
254 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
284 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
315 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
350 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
379 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
408 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
437 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
466 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
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Ds3c64xx.c110 .length = SZ_4K,
115 .length = SZ_4K,
120 .length = SZ_4K,
140 .length = SZ_4K,
145 .length = SZ_4K,
150 .length = SZ_4K,
/linux-5.19.10/arch/arm/mach-versatile/
Dintegrator_cp.c41 .length = SZ_4K,
46 .length = SZ_4K,
51 .length = SZ_4K,
/linux-5.19.10/arch/arm/mach-cns3xxx/
Dcore.c35 .length = SZ_4K,
40 .length = SZ_4K,
45 .length = SZ_4K,
51 .length = SZ_4K,
66 .length = SZ_4K,
260 void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); in cns3xxx_l2x0_init()
/linux-5.19.10/drivers/iommu/
Domap-iommu.h215 ((bytes) >= SZ_4K) ? SZ_4K : 0)
221 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
227 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
/linux-5.19.10/arch/arm/mach-ixp4xx/
Dixp4xx-of.c29 .length = SZ_4K,
37 .length = SZ_4K,
/linux-5.19.10/drivers/gpu/drm/meson/
Dmeson_rdma.c29 dma_alloc_coherent(priv->dev, SZ_4K, in meson_rdma_init()
55 dma_free_coherent(priv->dev, SZ_4K, in meson_rdma_free()
94 if (priv->rdma.offset >= (SZ_4K / RDMA_DESC_SIZE)) { in meson_rdma_writel()
/linux-5.19.10/arch/arm/mach-nomadik/
Dcpu-8815.c77 .length = SZ_4K,
89 void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K); in cpu8815_restart()
/linux-5.19.10/arch/x86/crypto/
Dblake2s-glue.c33 BUILD_BUG_ON(SZ_4K / BLAKE2S_BLOCK_SIZE < 8); in blake2s_compress()
42 SZ_4K / BLAKE2S_BLOCK_SIZE); in blake2s_compress()
/linux-5.19.10/arch/arm/mach-ep93xx/
Dvision_ep9307.c51 .length = SZ_4K,
177 .size = SZ_4K,
181 .size = SZ_4K,
/linux-5.19.10/drivers/acpi/arm64/
Dgtdt.c215 timer_mem->size = SZ_4K; in gtdt_parse_timer_block()
265 frame->size = SZ_4K; in gtdt_parse_timer_block()
339 DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), in gtdt_import_sbsa_gwdt()
340 DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), in gtdt_import_sbsa_gwdt()
/linux-5.19.10/arch/powerpc/include/asm/nohash/32/
Dpgtable.h239 return PAGE_SIZE / SZ_4K; in number_of_cells_per_pte()
243 return SZ_16K / SZ_4K; in number_of_cells_per_pte()
245 return SZ_512K / SZ_4K; in number_of_cells_per_pte()
259 for (i = 0; i < num; i++, entry++, new += SZ_4K) in pte_update()
/linux-5.19.10/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_io.h21 #define HINIC_DB_PAGE_SIZE SZ_4K
23 #define HINIC_HW_WQ_PAGE_SIZE SZ_4K
/linux-5.19.10/drivers/media/platform/qcom/venus/
Dhelpers.c957 uv_plane = uv_stride * uv_sclines + SZ_4K; in get_framesize_raw_nv12()
960 return ALIGN(size, SZ_4K); in get_framesize_raw_nv12()
973 y_meta_plane = ALIGN(y_meta_plane, SZ_4K); in get_framesize_raw_nv12_ubwc()
976 y_plane = ALIGN(y_stride * ALIGN(height, 32), SZ_4K); in get_framesize_raw_nv12_ubwc()
980 uv_meta_plane = ALIGN(uv_meta_plane, SZ_4K); in get_framesize_raw_nv12_ubwc()
983 uv_plane = ALIGN(uv_stride * ALIGN(height / 2, 32), SZ_4K); in get_framesize_raw_nv12_ubwc()
986 max(extradata, y_stride * 48), SZ_4K); in get_framesize_raw_nv12_ubwc()
1000 return ALIGN((y_plane + uv_plane), SZ_4K); in get_framesize_raw_p010()
1017 y_ubwc_plane = ALIGN(y_stride * y_sclines, SZ_4K); in get_framesize_raw_p010_ubwc()
1018 uv_ubwc_plane = ALIGN(uv_stride * uv_sclines, SZ_4K); in get_framesize_raw_p010_ubwc()
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