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Searched refs:SW_RST (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/thermal/qcom/
Dtsens-8960.c25 #define SW_RST BIT(1) macro
86 ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); in resume_8960()
136 ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST); in enable_8960()
/linux-5.19.10/drivers/clk/imx/
Dclk-composite-7ulp.c27 #define SW_RST BIT(28) macro
46 val |= SW_RST; in pcc_gate_enable()
/linux-5.19.10/drivers/net/ethernet/moxa/
Dmoxart_ether.h185 #define SW_RST BIT(2) /* software reset, last 64 AHB clocks */ macro
Dmoxart_ether.c96 writel(SW_RST, priv->base + REG_MAC_CTRL); in moxart_mac_reset()
97 while (readl(priv->base + REG_MAC_CTRL) & SW_RST) in moxart_mac_reset()
/linux-5.19.10/drivers/net/dsa/b53/
Db53_regs.h149 #define SW_RST BIT(7) macro
Db53_common.c828 reg |= SW_RST | EN_SW_RST | EN_CH_RST; in b53_switch_reset()
833 if (!(reg & SW_RST)) in b53_switch_reset()
/linux-5.19.10/drivers/spi/
Dspi-mtk-snfi.c186 #define SW_RST BIT(28) macro
387 nfi_rmw32(snf, SNF_MISC_CTL, 0, SW_RST); in mtk_snand_mac_reset()