Searched refs:SSB_CHIPCO_PMU_CTL_ILP_DIV (Results 1 – 2 of 2) sorted by relevance
169 pmuctl &= ~SSB_CHIPCO_PMU_CTL_ILP_DIV; in ssb_pmu0_pllinit_r0()171 & SSB_CHIPCO_PMU_CTL_ILP_DIV; in ssb_pmu0_pllinit_r0()310 pmuctl &= ~(SSB_CHIPCO_PMU_CTL_ILP_DIV | SSB_CHIPCO_PMU_CTL_XTALFREQ); in ssb_pmu1_pllinit_r0()312 & SSB_CHIPCO_PMU_CTL_ILP_DIV; in ssb_pmu1_pllinit_r0()
219 #define SSB_CHIPCO_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */ macro