| /linux-5.19.10/drivers/clk/samsung/ |
| D | clk-exynos3250.c | 33 #define SRC_TOP0 0xc210 macro
117 SRC_TOP0,
257 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
258 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24, 1),
259 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
260 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
261 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
262 MUX(CLK_MOUT_ACLK_266_0, "mout_aclk_266_0", mout_aclk_266_0_p, SRC_TOP0, 13, 1),
263 MUX(CLK_MOUT_ACLK_266, "mout_aclk_266", mout_aclk_266_p, SRC_TOP0, 12, 1),
264 MUX(CLK_MOUT_VPLL, "mout_vpll", mout_vpll_p, SRC_TOP0, 8, 1),
[all …]
|
| D | clk-exynos4.c | 40 #define SRC_TOP0 0xc210 macro
195 SRC_TOP0,
430 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
431 MUX(CLK_SCLK_EPLL, "sclk_epll", mout_epll_p, SRC_TOP0, 4, 1),
432 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
452 MUX(0, "mout_aclk200", sclk_ampll_p4210, SRC_TOP0, 12, 1),
453 MUX(0, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1),
454 MUX(0, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1),
455 MUX(0, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1),
466 MUX(CLK_SCLK_VPLL, "sclk_vpll", sclk_vpll_p4210, SRC_TOP0, 8, 1),
[all …]
|
| D | clk-exynos5420.c | 51 #define SRC_TOP0 0x10200 macro
183 SRC_TOP0,
470 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
471 MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
472 MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
473 MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2),
553 MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2),
554 MUX(0, "mout_aclk400_mscl", mout_group1_p, SRC_TOP0, 4, 2),
555 MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2),
556 MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2),
[all …]
|
| D | clk-exynos5250.c | 40 #define SRC_TOP0 0x10210 macro
121 SRC_TOP0,
268 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
269 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
270 MUX(0, "mout_aclk300_disp1_mid", mout_aclk200_p, SRC_TOP0, 14, 1),
271 MUX(0, "mout_aclk300", mout_aclk300_p, SRC_TOP0, 15, 1),
272 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
273 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
|
| D | clk-exynos5410.c | 42 #define SRC_TOP0 0x10210 macro
117 MUX(0, "mout_aclk200", mpll_bpll_p, SRC_TOP0, 12, 1),
118 MUX(0, "mout_aclk400", mpll_bpll_p, SRC_TOP0, 20, 1),
|