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Searched refs:SPI_PS_INPUT_CNTL_20__OFFSET_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7872 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK 0x0000003fL macro
Dgfx_7_2_sh_mask.h8541 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK 0x3f macro
Dgfx_8_0_sh_mask.h10023 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK 0x3f macro
Dgfx_8_1_sh_mask.h10421 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK 0x3f macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16040 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_9_1_sh_mask.h17349 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_9_2_1_sh_mask.h17224 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_9_4_2_sh_mask.h9473 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_11_0_0_sh_mask.h21184 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_10_1_0_sh_mask.h23422 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro
Dgc_10_3_0_sh_mask.h21640 #define SPI_PS_INPUT_CNTL_20__OFFSET_MASK … macro