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Searched refs:SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7481 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT 0x0000000a macro
Dgfx_7_2_sh_mask.h9260 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT 0xa macro
Dgfx_8_0_sh_mask.h10980 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT 0xa macro
Dgfx_8_1_sh_mask.h11378 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT 0xa macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h20372 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_9_1_sh_mask.h21683 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_9_2_1_sh_mask.h21613 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_9_4_2_sh_mask.h13811 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_11_0_0_sh_mask.h27696 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_10_1_0_sh_mask.h8485 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro
Dgc_10_3_0_sh_mask.h8826 #define SPI_CONFIG_CNTL_1__LBPW_CU_CHK_CNT__SHIFT … macro