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Searched refs:SHA1 (Results 1 – 25 of 29) sorted by relevance

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/linux-5.19.10/net/sctp/
DKconfig66 bool "Enable optional SHA1 hmac cookie generation"
68 Enable optional SHA1 hmac based SCTP cookie generation
86 bool "Enable optional SHA1 hmac cookie generation"
88 Enable optional SHA1 hmac based SCTP cookie generation
/linux-5.19.10/arch/sparc/crypto/
Dsha1_asm.S28 SHA1
65 SHA1
Dopcodes.h23 #define SHA1 \ macro
/linux-5.19.10/drivers/crypto/
DKconfig42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
48 Use VIA PadLock for SHA1/SHA256 algorithms.
290 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
374 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
375 This will select software SHA1, MD5 and SHA256 as they are
447 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
450 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
509 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
[all …]
/linux-5.19.10/tools/build/feature/
Dtest-libcrypto.c22 SHA1(&dat[0], sizeof(dat), &md[0]); in main()
/linux-5.19.10/arch/arm/crypto/
DKconfig13 tristate "SHA1 digest algorithm (ARM-asm)"
21 tristate "SHA1 digest algorithm (ARM NEON)"
32 tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
Dsha1-ce-glue.c91 module_cpu_feature_match(SHA1, sha1_ce_mod_init);
/linux-5.19.10/Documentation/driver-api/mtd/
Dspi-intel.rst61 The SHA1 sums must match. Otherwise do not continue any further!
80 The SHA1 sums should match.
/linux-5.19.10/Documentation/devicetree/bindings/crypto/
Dimg-hash.txt4 SHA1, SHA224, SHA256 and MD5 hashes
/linux-5.19.10/tools/perf/tests/shell/
Dbuildid.sh40 ex_sha1=$(mktemp /tmp/perf.ex.SHA1.XXX)
/linux-5.19.10/arch/arm64/crypto/
Dsha1-ce-glue.c146 module_cpu_feature_match(SHA1, sha1_ce_mod_init);
/linux-5.19.10/arch/arm64/include/asm/
Dhwcap.h60 #define KERNEL_HWCAP_SHA1 __khwcap_feature(SHA1)
/linux-5.19.10/Documentation/translations/zh_CN/arm64/
Delf_hwcaps.rst77 ID_AA64ISAR0_EL1.SHA1 == 0b0001 表示有此功能。
/linux-5.19.10/Documentation/translations/zh_TW/arm64/
Delf_hwcaps.rst80 ID_AA64ISAR0_EL1.SHA1 == 0b0001 表示有此功能。
/linux-5.19.10/Documentation/security/
Ddigsig.rst47 keyid equals to SHA1[12-19] over the total key content.
DIMA-templates.rst66 calculated with the SHA1 or MD5 hash algorithm;
/linux-5.19.10/Documentation/crypto/
Dapi-intro.rst193 - Steve Reid (SHA1)
204 SHA1 algorithm contributors:
/linux-5.19.10/drivers/crypto/allwinner/
DKconfig22 and SHA1 and MD5 hash algorithms.
/linux-5.19.10/tools/perf/util/
Dgenelf.c137 SHA1(code, csize, (unsigned char *)note->build_id); in gen_build_id()
/linux-5.19.10/arch/arm64/kernel/
Dcpuinfo.c143 [COMPAT_KERNEL_HWCAP2(SHA1)] = "sha1",
/linux-5.19.10/arch/arm64/tools/
Dsysreg105 Enum 11:8 SHA1
/linux-5.19.10/crypto/
DKconfig849 It's speed is comparable to SHA1 and there are no known attacks
856 tristate "SHA1 digest algorithm"
862 tristate "SHA1 digest algorithm (SSSE3/AVX/AVX2/SHA-NI)"
906 tristate "SHA1 digest algorithm (OCTEON)"
915 tristate "SHA1 digest algorithm (SPARC64)"
924 tristate "SHA1 digest algorithm (powerpc)"
931 tristate "SHA1 digest algorithm (PPC SPE)"
938 tristate "SHA1 digest algorithm"
/linux-5.19.10/Documentation/arm64/
Delf_hwcaps.rst86 Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.
Dcpu-feature-registers.rst142 | SHA1 | [11-8] | y |
/linux-5.19.10/security/integrity/ima/
DKconfig98 bool "SHA1 (default)"

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