Searched refs:SET_REG (Results 1 – 7 of 7) sorted by relevance
| /linux-5.19.10/sound/pci/hda/ |
| D | patch_si3054.c | 65 #define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val)) macro
143 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate); in si3054_pcm_prepare()
147 SET_REG(codec, SI3054_LINE_LEVEL, val); in si3054_pcm_prepare()
217 SET_REG(codec, SI3054_LINE_RATE, 9600); in si3054_init()
218 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK); in si3054_init()
219 SET_REG(codec, SI3054_EXTENDED_MID, 0); in si3054_init()
233 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff); in si3054_init()
234 SET_REG(codec, SI3054_GPIO_CFG, 0x0); in si3054_init()
235 SET_REG(codec, SI3054_MISC_AFE, 0); in si3054_init()
236 SET_REG(codec, SI3054_LINE_CFG1,0x200); in si3054_init()
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| /linux-5.19.10/drivers/clocksource/ |
| D | asm9260_timer.c | 28 #define SET_REG 4 macro
115 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); in asm9260_timer_set_next_event()
137 priv.base + HW_MCR + SET_REG); in asm9260_timer_set_oneshot()
151 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); in asm9260_timer_set_periodic()
233 writel_relaxed(BM_C1_EN, priv.base + HW_TCR + SET_REG); in asm9260_timer_init()
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| /linux-5.19.10/drivers/irqchip/ |
| D | irq-mxs.c | 29 #define SET_REG 4 macro
98 icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); in icoll_unmask_irq()
114 icoll_intr_reg(d) + SET_REG); in asm9260_unmask_irq()
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| D | alphascale_asm9260-icoll.h | 100 + SET_REG)
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| /linux-5.19.10/arch/ia64/kernel/ |
| D | head.S | 1055 #define SET_REG(reg) \ macro
1063 SET_REG(b1);
1064 SET_REG(b2);
1065 SET_REG(b3);
1066 SET_REG(b4);
1067 SET_REG(b5);
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| /linux-5.19.10/drivers/media/dvb-frontends/ |
| D | stv0910.c | 209 #define SET_REG(_reg, _val) \ macro
923 SET_REG(UPLCCST0, 0xe0); in init_search_param()
1678 SET_REG(DISTXFIFO, cmd->msg[i]); in send_master_cmd()
1700 SET_REG(DISTXFIFO, value); in send_burst()
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| /linux-5.19.10/drivers/tty/serial/ |
| D | mxs-auart.c | 45 #define SET_REG 0x4 macro
500 writel_relaxed(val, addr + SET_REG); in mxs_set()
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