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Searched refs:SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h546 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa macro
Dsdma1_4_2_2_sh_mask.h548 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro
Dsdma1_4_2_sh_mask.h544 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1496 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa macro
Doss_2_4_sh_mask.h1662 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa macro
Doss_3_0_1_sh_mask.h2180 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa macro
Doss_3_0_sh_mask.h2484 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3051 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2757 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro
Dgc_10_1_0_sh_mask.h3026 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro
Dgc_10_3_0_sh_mask.h3135 #define SDMA1_STATUS1_REG__CE_AFIFO_FULL__SHIFT macro