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Searched refs:SDMA0_UCODE_ADDR__VALUE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h28 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
Dsdma0_4_0_sh_mask.h28 #define SDMA0_UCODE_ADDR__VALUE_MASK 0x00001FFFL macro
Dsdma0_4_2_2_sh_mask.h28 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
Dsdma0_4_2_sh_mask.h28 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h835 #define SDMA0_UCODE_ADDR__VALUE_MASK 0x7ff macro
Doss_2_4_sh_mask.h907 #define SDMA0_UCODE_ADDR__VALUE_MASK 0xfff macro
Doss_3_0_1_sh_mask.h911 #define SDMA0_UCODE_ADDR__VALUE_MASK 0x1fff macro
Doss_3_0_sh_mask.h1417 #define SDMA0_UCODE_ADDR__VALUE_MASK 0x1fff macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h30 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h5089 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
Dgc_10_1_0_sh_mask.h39968 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro
Dgc_10_3_0_sh_mask.h35306 #define SDMA0_UCODE_ADDR__VALUE_MASK … macro