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Searched refs:SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h547 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
Dsdma0_4_0_sh_mask.h548 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT 0x4 macro
Dsdma0_4_2_2_sh_mask.h554 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
Dsdma0_4_2_sh_mask.h548 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h972 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT 0x4 macro
Doss_2_4_sh_mask.h1056 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT 0x4 macro
Doss_3_0_1_sh_mask.h1074 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT 0x4 macro
Doss_3_0_sh_mask.h1580 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT 0x4 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h239 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h224 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
Dgc_10_1_0_sh_mask.h256 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro
Dgc_10_3_0_sh_mask.h257 #define SDMA0_STATUS1_REG__CE_OUT_IDLE__SHIFT macro