Searched refs:RP_PRIV_MISC_CTLR_CLK_CLAMP_THRESHOLD_MASK (Results 1 – 1 of 1) sorted by relevance
218 #define RP_PRIV_MISC_CTLR_CLK_CLAMP_THRESHOLD_MASK (0x7f << 16) macro561 value &= ~(RP_PRIV_MISC_CTLR_CLK_CLAMP_THRESHOLD_MASK | in tegra_pcie_enable_rp_features()