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Searched refs:RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c5481 if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK) in gfx_v8_0_get_clockgating_state()
5780 data |= RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v8_0_update_coarse_grain_clock_gating()
5788 data &= ~RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v8_0_update_coarse_grain_clock_gating()
5829 RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v8_0_update_coarse_grain_clock_gating()
Dgfx_v6_0.c2561 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v6_0_enable_cgcg()
2570 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v6_0_enable_cgcg()
Dgfx_v7_0.c3577 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v7_0_enable_cgcg()
3589 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v7_0_enable_cgcg()
Dgfx_v11_0.c5048 RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5107 data &= ~RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5267 if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK) in gfx_v11_0_get_clockgating_state()
Dgfx_v9_0.c5017 RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v9_0_update_coarse_grain_clock_gating()
5030 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v9_0_update_coarse_grain_clock_gating()
5222 if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK) in gfx_v9_0_get_clockgating_state()
Dgfx_v10_0.c8051 RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v10_0_update_coarse_grain_clock_gating()
8070 data &= ~RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v10_0_update_coarse_grain_clock_gating()
8462 if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK) in gfx_v10_0_get_clockgating_state()
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7066 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK 0x00000002L macro
Dgfx_7_2_sh_mask.h7889 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK 0x2 macro
Dgfx_8_0_sh_mask.h8807 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK 0x2 macro
Dgfx_8_1_sh_mask.h9357 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK 0x2 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h23124 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_9_1_sh_mask.h24415 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_9_2_1_sh_mask.h24476 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_9_4_2_sh_mask.h21925 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_11_0_0_sh_mask.h34414 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_10_1_0_sh_mask.h33462 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro
Dgc_10_3_0_sh_mask.h32536 #define RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK … macro