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Searched refs:RING_HWS_PGA (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/i915/gt/ !
Dintel_engine_regs.h65 #define RING_HWS_PGA(base) _MMIO((base) + 0x80) macro
Dintel_ring_submission.c107 hwsp = RING_HWS_PGA(engine->mmio_base); in set_hwsp()
Dintel_execlists_submission.c2919 RING_HWS_PGA, in enable_execlists()
2921 ENGINE_POSTING_READ(engine, RING_HWS_PGA); in enable_execlists()
/linux-5.19.10/drivers/gpu/drm/i915/gt/uc/ !
Dintel_guc_ads.c357 ret |= GUC_MMIO_REG_ADD(gt, regset, RING_HWS_PGA(base), false); in guc_mmio_regset_init()
Dintel_guc_capture.c68 { RING_HWS_PGA(0), 0, 0, "HWS" }, \
Dintel_guc_submission.c3947 RING_HWS_PGA, in setup_hwsp()
/linux-5.19.10/drivers/gpu/drm/i915/ !
Dintel_gvt_mmio_table.c803 MMIO_RING_D(RING_HWS_PGA); in iterate_bdw_plus_mmio()
Di915_gpu_error.c1263 mmio = RING_HWS_PGA(engine->mmio_base); in engine_record_registers()
/linux-5.19.10/drivers/gpu/drm/i915/gvt/ !
Dhandlers.c2528 MMIO_RING_GM(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write); in init_bdw_mmio_info()