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Searched refs:REG_UPDATE_6 (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_opp.c123 REG_UPDATE_6(DPG_CONTROL, in opp2_set_disp_pattern_generator()
182 REG_UPDATE_6(DPG_CONTROL, in opp2_set_disp_pattern_generator()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_afmt.c76 REG_UPDATE_6(AFMT_60958_2, in afmt3_setup_hdmi_audio()
Ddcn30_hubp.c359 REG_UPDATE_6(DCSURF_SURFACE_CONTROL, in hubp3_dcc_control_sienna_cichlid()
Ddcn30_dio_stream_encoder.c566 REG_UPDATE_6(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_opp.c123 REG_UPDATE_6(FMT_BIT_DEPTH_CONTROL, in opp1_set_spatial_dither()
Ddcn10_stream_encoder.c517 REG_UPDATE_6(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
1323 REG_UPDATE_6(AFMT_60958_2, in enc1_se_setup_hdmi_audio()
Ddcn10_mpc.c96 REG_UPDATE_6(MPCC_SM_CONTROL[mpcc_id], in mpc1_update_stereo_mix()
Ddcn10_dpp_dscl.c309 REG_UPDATE_6(DSCL_2TAP_CONTROL, in dpp1_dscl_set_scl_filter()
Ddcn10_hubp.c148 REG_UPDATE_6(DCSURF_ADDR_CONFIG, in hubp1_program_tiling()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_i2c_hw.c324 REG_UPDATE_6(DC_I2C_CONTROL, in setup_engine()
Ddce_mem_input.c436 REG_UPDATE_6(GRPH_CONTROL, in program_tiling()
Ddce_stream_encoder.c1333 REG_UPDATE_6(AFMT_60958_2, in dce110_se_setup_hdmi_audio()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddcn30_fpu.c244 REG_UPDATE_6(OTG_V_TOTAL_CONTROL, in optc3_fpu_set_vrr_m_const()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h260 #define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \ macro