Searched refs:REG_PTR (Results 1 – 3 of 3) sorted by relevance
| /linux-5.19.10/arch/riscv/kernel/ |
| D | traps_misaligned.c | 131 #define REG_PTR(insn, pos, regs) \ macro
136 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
137 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
138 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
139 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
140 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
141 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
142 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
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| /linux-5.19.10/arch/riscv/kvm/ |
| D | vcpu_exit.c | 109 #define REG_PTR(insn, pos, regs) \ macro
114 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
115 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
116 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
117 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
118 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
119 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
120 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
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| /linux-5.19.10/arch/alpha/kernel/ |
| D | pc873xx.h | 11 #define REG_PTR 0x02 macro
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