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Searched refs:REG_MSU_MSC0BAR (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/hwtracing/intel_th/
Dmsu.h17 REG_MSU_MSC0BAR = 0x0108, /* MSC0 output base address */ enumerator
Dmsu.c775 msc->orig_addr = ioread32(msc->reg_base + REG_MSU_MSC0BAR); in msc_configure()
779 iowrite32(reg, msc->reg_base + REG_MSU_MSC0BAR); in msc_configure()
852 iowrite32(msc->orig_addr, msc->reg_base + REG_MSU_MSC0BAR); in msc_disable()