Searched refs:REG_DSI_7nm_PHY_CMN_TIMING_CTRL_1 (Results 1 – 2 of 2) sorted by relevance
102 #define REG_DSI_7nm_PHY_CMN_TIMING_CTRL_1 0x000000b8 macro
973 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_1, timing->clk_zero); in dsi_7nm_phy_enable()