Searched refs:REG_DSI_7nm_PHY_CMN_CTRL_0 (Results 1 – 2 of 2) sorted by relevance
312 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()315 dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0, data & ~BIT(5)); in dsi_pll_disable_pll_bias()321 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()323 dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0, data | BIT(5)); in dsi_pll_enable_pll_bias()902 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, data); in dsi_7nm_phy_enable()943 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, 0x7f); in dsi_7nm_phy_enable()1024 data = dsi_phy_read(base + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_7nm_phy_disable()1028 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, data); in dsi_7nm_phy_disable()1032 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CTRL_0, 0x00); in dsi_7nm_phy_disable()
74 #define REG_DSI_7nm_PHY_CMN_CTRL_0 0x00000024 macro