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Searched refs:REG_DSI_28nm_PHY_PLL_TEST_CFG (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/msm/dsi/
Ddsi_phy_28nm.xml.h325 #define REG_DSI_28nm_PHY_PLL_TEST_CFG 0x00000068 macro
/linux-5.19.10/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_28nm.c106 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_TEST_CFG, in pll_28nm_software_reset()
108 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_TEST_CFG, 0x00, 1); in pll_28nm_software_reset()