Searched refs:REG_DSI_10nm_PHY_CMN_CTRL_0 (Results 1 – 2 of 2) sorted by relevance
305 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()308 dsi_phy_write(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()315 u32 data = dsi_phy_read(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()317 dsi_phy_write(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()845 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()891 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, 0x7f); in dsi_10nm_phy_enable()894 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_enable()898 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_enable()930 data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_10nm_phy_disable()934 dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data); in dsi_10nm_phy_disable()[all …]
74 #define REG_DSI_10nm_PHY_CMN_CTRL_0 0x00000024 macro