Searched refs:PP_ON (Results 1 – 11 of 11) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/gma500/ |
D | psb_lid.c | 31 } while ((pp_status & PP_ON) == 0 && in psb_lid_timer_func() 34 if (REG_READ(PP_STATUS) & PP_ON) { in psb_lid_timer_func() 47 } while ((pp_status & PP_ON) == 0); in psb_lid_timer_func()
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D | psb_intel_lvds.c | 223 } while ((pp_status & PP_ON) == 0); in psb_intel_lvds_set_power() 234 } while (pp_status & PP_ON); in psb_intel_lvds_set_power() 322 } while ((pp_status & PP_ON) == 0); in psb_intel_lvds_restore() 328 } while (pp_status & PP_ON); in psb_intel_lvds_restore()
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D | oaktrail_lvds.c | 50 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY); in oaktrail_lvds_set_power() 61 } while (pp_status & PP_ON); in oaktrail_lvds_set_power()
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D | cdv_intel_lvds.c | 119 } while ((pp_status & PP_ON) == 0); in cdv_intel_lvds_set_power() 130 } while (pp_status & PP_ON); in cdv_intel_lvds_set_power()
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D | psb_intel_reg.h | 151 # define PP_ON (1 << 31) macro
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D | cdv_intel_dp.c | 413 u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_NONE; in cdv_intel_edp_panel_on() 439 u32 pp, idle_off_mask = PP_ON ; in cdv_intel_edp_panel_off()
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/linux-5.19.10/drivers/gpu/drm/i915/display/ |
D | intel_pps.c | 239 return intel_de_read(dev_priv, PP_STATUS(pipe)) & PP_ON; in vlv_pipe_has_pp_on() 415 return (intel_de_read(dev_priv, _pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power() 447 #define IDLE_ON_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) 448 #define IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_I… 450 #define IDLE_OFF_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | 0) 453 #define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK)
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D | intel_lvds.c | 325 if (intel_de_wait_for_set(dev_priv, PP_STATUS(0), PP_ON, 5000)) in intel_enable_lvds() 342 if (intel_de_wait_for_clear(dev_priv, PP_STATUS(0), PP_ON, 1000)) in intel_disable_lvds()
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D | intel_display_power.c | 1163 I915_STATE_WARN(intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON, in assert_can_disable_lcpll()
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/linux-5.19.10/drivers/gpu/drm/i915/gvt/ |
D | handlers.c | 372 vgpu_vreg_t(vgpu, PCH_PP_STATUS) |= PP_ON; in pch_pp_control_mmio_write() 379 ~(PP_ON | PP_SEQUENCE_POWER_DOWN in pch_pp_control_mmio_write()
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/linux-5.19.10/drivers/gpu/drm/i915/ |
D | i915_reg.h | 2823 #define PP_ON REG_BIT(31) macro
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