Searched refs:PORT_LOGIC_LINK_WIDTH_2_LANES (Results 1 – 2 of 2) sorted by relevance
67 #define PORT_LOGIC_LINK_WIDTH_2_LANES PORT_LOGIC_LINK_WIDTH(0x2) macro
786 val |= PORT_LOGIC_LINK_WIDTH_2_LANES; in dw_pcie_setup()