Searched refs:PORT_LOGIC_LINK_WIDTH_1_LANES (Results 1 – 2 of 2) sorted by relevance
66 #define PORT_LOGIC_LINK_WIDTH_1_LANES PORT_LOGIC_LINK_WIDTH(0x1) macro
783 val |= PORT_LOGIC_LINK_WIDTH_1_LANES; in dw_pcie_setup()