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Searched refs:PIPECONF_STATE_ENABLE (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/i915/gvt/
Ddisplay.c188 ~(PIPECONF_ENABLE | PIPECONF_STATE_ENABLE); in emulate_monitor_status_change()
249 vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_STATE_ENABLE; in emulate_monitor_status_change()
Dhandlers.c700 vgpu_vreg(vgpu, offset) |= PIPECONF_STATE_ENABLE; in pipeconf_mmio_write()
704 vgpu_vreg(vgpu, offset) &= ~PIPECONF_STATE_ENABLE; in pipeconf_mmio_write()
/linux-5.19.10/drivers/gpu/drm/i915/display/
Dicl_dsi.c1055 PIPECONF_STATE_ENABLE, 10)) in gen11_dsi_enable_transcoder()
1323 PIPECONF_STATE_ENABLE, 50)) in gen11_dsi_disable_transcoder()
Dintel_display.c435 PIPECONF_STATE_ENABLE, 100)) in intel_wait_for_pipe_off()
/linux-5.19.10/drivers/gpu/drm/i915/
Di915_reg.h3699 #define PIPECONF_STATE_ENABLE REG_BIT(30) /* i965+ */ macro