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Searched refs:PHY_TST_CTRL1 (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/sprd/
Dsprd_dsi.c130 #define PHY_TST_CTRL1 0xF4 macro
176 dsi_reg_up(ctx, PHY_TST_CTRL1, PHY_TESTEN, PHY_TESTEN); in regmap_tst_io_write()
177 dsi_reg_wr(ctx, PHY_TST_CTRL1, PHY_TESTDIN, 0, reg); in regmap_tst_io_write()
180 dsi_reg_up(ctx, PHY_TST_CTRL1, PHY_TESTEN, 0); in regmap_tst_io_write()
181 dsi_reg_wr(ctx, PHY_TST_CTRL1, PHY_TESTDIN, 0, val); in regmap_tst_io_write()
197 dsi_reg_up(ctx, PHY_TST_CTRL1, PHY_TESTEN, PHY_TESTEN); in regmap_tst_io_read()
198 dsi_reg_wr(ctx, PHY_TST_CTRL1, PHY_TESTDIN, 0, reg); in regmap_tst_io_read()
201 dsi_reg_up(ctx, PHY_TST_CTRL1, PHY_TESTEN, 0); in regmap_tst_io_read()
205 ret = dsi_reg_rd(ctx, PHY_TST_CTRL1, PHY_TESTDOUT, 8); in regmap_tst_io_read()
/linux-5.19.10/drivers/gpu/drm/hisilicon/kirin/
Ddw_dsi_reg.h25 #define PHY_TST_CTRL1 0xB8 /* D-PHY test interface control 1 */ macro
Ddw_drm_dsi.c318 writel(reg_write, base + PHY_TST_CTRL1); in dsi_phy_tst_set()
325 writel(val, base + PHY_TST_CTRL1); in dsi_phy_tst_set()