Searched refs:PHYSYMCLK_FORCE_SRC_SYMCLK (Results 1 – 4 of 4) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_dccg.c | 657 dccg31_set_physymclk(dccg, 0, PHYSYMCLK_FORCE_SRC_SYMCLK, false); in dccg31_init() 658 dccg31_set_physymclk(dccg, 1, PHYSYMCLK_FORCE_SRC_SYMCLK, false); in dccg31_init() 659 dccg31_set_physymclk(dccg, 2, PHYSYMCLK_FORCE_SRC_SYMCLK, false); in dccg31_init() 660 dccg31_set_physymclk(dccg, 3, PHYSYMCLK_FORCE_SRC_SYMCLK, false); in dccg31_init() 661 dccg31_set_physymclk(dccg, 4, PHYSYMCLK_FORCE_SRC_SYMCLK, false); in dccg31_init()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | dccg.h | 43 …PHYSYMCLK_FORCE_SRC_SYMCLK, // Select symclk as source of clock which is output to PHY through … enumerator
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/link/ |
D | link_hwss_hpo_dp.c | 218 PHYSYMCLK_FORCE_SRC_SYMCLK, in disable_hpo_dp_fpga_link_output()
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/linux-5.19.10/drivers/gpu/drm/amd/include/ |
D | soc21_enum.h | 5781 PHYSYMCLK_FORCE_SRC_SYMCLK = 0x00000000, enumerator
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