PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (reference) in projects: linux-5.19.10

Searched refs:PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
D	exynos7-clk.h	`136 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro`
/linux-5.19.10/drivers/clk/samsung/
D	clk-exynos7.c	`951 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,`
/linux-5.19.10/arch/arm64/boot/dts/exynos/
D	exynos7.dtsi	`684 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,`