Searched refs:PD0 (Results 1 – 19 of 19) sorted by relevance
| /linux-5.19.10/Documentation/hwmon/ |
| D | max197.rst | 47 7,6 PD1,PD0 Clock and Power-Down modes
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| /linux-5.19.10/arch/arm/boot/dts/ |
| D | at91sam9m10g45ek.dts | 161 <AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
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| D | sunxi-h3-h5.dtsi | 416 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| D | at91sam9g45.dtsi | 461 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
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| D | sama5d3.dtsi | 699 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
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| D | sun9i-a80.dtsi | 997 pins = "PD0", "PD1", "PD2", "PD3",
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| D | sun6i-a31.dtsi | 676 pins = "PD0", "PD1", "PD2", "PD3",
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| D | sun7i-a20.dtsi | 937 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| /linux-5.19.10/arch/mips/boot/dts/ingenic/ |
| D | qi_lb60.dts | 343 pins = "PD0", "PD2";
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| /linux-5.19.10/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-a64.dtsi | 724 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
795 pins = "PD0", "PD1", "PD2", "PD3";
820 pins = "PD0", "PD1";
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| D | sun50i-h6.dtsi | 328 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| /linux-5.19.10/arch/powerpc/boot/dts/ |
| D | kmeter1.dts | 223 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */
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| /linux-5.19.10/drivers/pinctrl/renesas/ |
| D | pfc-shx3.c | 323 PINMUX_GPIO(PD0),
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| D | pfc-sh7786.c | 445 PINMUX_GPIO(PD0),
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| D | pfc-sh7785.c | 709 PINMUX_GPIO(PD0),
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| D | pfc-sh7203.c | 760 PINMUX_GPIO(PD0),
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| D | pfc-sh7264.c | 1128 PINMUX_GPIO(PD0),
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| D | pfc-sh7269.c | 1509 PINMUX_GPIO(PD0),
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| /linux-5.19.10/drivers/iommu/ |
| D | msm_iommu_hw-8xxx.h | 588 #define SET_PD0(b, c, v) SET_CONTEXT_FIELD(b, c, TTBCR, PD0, v)
775 #define GET_PD0(b, c) GET_CONTEXT_FIELD(b, c, TTBCR, PD0)
1155 #define PD0 (PD0_MASK << PD0_SHIFT) macro
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