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Searched refs:PCLK_PWM0 (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dpx30-cru.h162 #define PCLK_PWM0 339 macro
Drk3308-cru.h185 #define PCLK_PWM0 206 macro
Drk3368-cru.h134 #define PCLK_PWM0 350 macro
Drk3568-cru.h61 #define PCLK_PWM0 48 macro
/linux-5.19.10/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi491 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
502 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
513 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
524 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
Drk356x.dtsi439 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
450 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
461 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
472 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
Dpx30.dtsi621 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
632 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
643 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
654 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
/linux-5.19.10/drivers/clk/rockchip/
Dclk-rk3368.c704 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(12), 0, GFLAGS),
Dclk-rk3308.c874 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 3, GFLAGS),
Dclk-px30.c856 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 15, GFLAGS),
Dclk-rk3568.c1505 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0,