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Searched refs:PCIE0_BASE__INST0_SEG4 (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h829 #define PCIE0_BASE__INST0_SEG4 0 macro
Dnavi14_ip_offset.h829 #define PCIE0_BASE__INST0_SEG4 0x0241B000 macro
Dsienna_cichlid_ip_offset.h836 #define PCIE0_BASE__INST0_SEG4 0x0241B000 macro
Dbeige_goby_ip_offset.h984 #define PCIE0_BASE__INST0_SEG4 0x0241B000 macro
Drenoir_ip_offset.h1079 #define PCIE0_BASE__INST0_SEG4 0 macro
Dvangogh_ip_offset.h1184 #define PCIE0_BASE__INST0_SEG4 0x0241B000 macro
Darct_ip_offset.h866 #define PCIE0_BASE__INST0_SEG4 0 macro
Daldebaran_ip_offset.h1154 #define PCIE0_BASE__INST0_SEG4 0 macro