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Searched refs:PCIE (Results 1 – 25 of 67) sorted by relevance

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/linux-5.19.10/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ !
Dpcie.c577 brcmf_dbg(PCIE, "config offset 0x%04x, value 0x%04x\n", in brcmf_pcie_reset_device()
648 brcmf_dbg(PCIE, "MB transaction is already pending 0x%04x\n", in brcmf_pcie_send_mb_data()
687 brcmf_dbg(PCIE, "D2H_MB_DATA: 0x%04x\n", dtoh_mb_data); in brcmf_pcie_handle_mb_data()
689 brcmf_dbg(PCIE, "D2H_MB_DATA: DEEP SLEEP REQ\n"); in brcmf_pcie_handle_mb_data()
691 brcmf_dbg(PCIE, "D2H_MB_DATA: sent DEEP SLEEP ACK\n"); in brcmf_pcie_handle_mb_data()
694 brcmf_dbg(PCIE, "D2H_MB_DATA: DEEP SLEEP EXIT\n"); in brcmf_pcie_handle_mb_data()
696 brcmf_dbg(PCIE, "D2H_MB_DATA: D3 ACK\n"); in brcmf_pcie_handle_mb_data()
701 brcmf_dbg(PCIE, "D2H_MB_DATA: FW HALT\n"); in brcmf_pcie_handle_mb_data()
807 brcmf_dbg(PCIE, "Enter\n"); in brcmf_pcie_quick_check_isr()
821 brcmf_dbg(PCIE, "Enter %x\n", status); in brcmf_pcie_isr_thread()
[all …]
DKconfig41 bool "PCIE bus interface support for FullMAC driver"
47 This option enables the PCIE bus interface support for Broadcom
49 use the driver for an PCIE wireless card.
/linux-5.19.10/drivers/phy/amlogic/ !
DKconfig52 tristate "Meson G12A USB3+PCIE Combo PHY driver"
58 Enable this to support the Meson USB3 + PCIE Combo PHY found
63 tristate "Meson AXG PCIE PHY driver"
69 Enable this to support the Meson MIPI + PCIE PHY found
74 tristate "Meson AXG MIPI + PCIE analog PHY driver"
81 Enable this to support the Meson MIPI + PCIE analog PHY
/linux-5.19.10/Documentation/devicetree/bindings/arm/mediatek/ !
Dmediatek,mt7622-pcie-mirror.yaml7 title: MediaTek PCIE Mirror Controller for MT7622
14 The mediatek PCIE mirror provides a configuration interface for PCIE
/linux-5.19.10/drivers/infiniband/hw/hfi1/ !
Dchip_registers.h20 #define PCIE 0 macro
584 #define PCI_CFG_MSIX0 (PCIE + 0x0000000000B0)
585 #define PCI_CFG_REG1 (PCIE + 0x000000000004)
586 #define PCI_CFG_REG11 (PCIE + 0x00000000002C)
587 #define PCIE_CFG_SPCIE1 (PCIE + 0x00000000014C)
588 #define PCIE_CFG_SPCIE2 (PCIE + 0x000000000150)
589 #define PCIE_CFG_TPH2 (PCIE + 0x000000000180)
1269 #define PCIE_CFG_REG_PL2 (PCIE + 0x000000000708)
1270 #define PCIE_CFG_REG_PL3 (PCIE + 0x00000000070C)
1273 #define PCIE_CFG_REG_PL102 (PCIE + 0x000000000898)
[all …]
/linux-5.19.10/drivers/net/ethernet/huawei/hinic/ !
DKconfig7 tristate "Huawei Intelligent PCIE Network Interface Card"
11 This driver supports HiNIC PCIE Ethernet cards.
/linux-5.19.10/drivers/phy/st/ !
Dphy-spear1340-miphy.c76 PCIE, enumerator
163 else if (priv->mode == PCIE) in spear1340_miphy_init()
176 else if (priv->mode == PCIE) in spear1340_miphy_exit()
233 if (priv->mode != SATA && priv->mode != PCIE) { in spear1340_miphy_xlate()
Dphy-spear1310-miphy.c97 PCIE, enumerator
155 if (priv->mode == PCIE) in spear1310_miphy_init()
166 if (priv->mode == PCIE) in spear1310_miphy_exit()
196 if (priv->mode != SATA && priv->mode != PCIE) { in spear1310_miphy_xlate()
/linux-5.19.10/Documentation/devicetree/bindings/clock/ !
Dqcom,gcc-sm8450.yaml27 - description: PCIE 0 Pipe clock source (Optional clock)
28 - description: PCIE 1 Pipe clock source (Optional clock)
29 - description: PCIE 1 Phy Auxillary clock source (Optional clock)
Dqcom,gcc-sdm845.yaml29 - description: PCIE 0 Pipe clock source
30 - description: PCIE 1 Pipe clock source
Dqcom,gcc-sc7280.yaml28 - description: PCIE-0 pipe clock source
29 - description: PCIE-1 pipe clock source
Dqcom,gcc-sm8350.yaml28 - description: PCIE 0 Pipe clock source (Optional clock)
29 - description: PCIE 1 Pipe clock source (Optional clock)
/linux-5.19.10/Documentation/devicetree/bindings/net/wireless/ !
Dmarvell-8xxx.txt1 Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices
4 This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
5 The node is expected to be specified as a child node to the SDIO/PCIE controller that
/linux-5.19.10/drivers/phy/freescale/ !
DKconfig22 tristate "Freescale i.MX8M PCIE PHY"
26 Enable this to add support for the PCIE PHY as found on
/linux-5.19.10/Documentation/translations/zh_CN/vm/ !
Dhmm.rst67 如果我们只考虑 PCIE 总线,那么设备可以访问主内存(通常通过 IOMMU)并与 CPU 缓存一
72 另一个严重的因素是带宽有限(约 32GBytes/s,PCIE 4.0 和 16 通道)。这比最快的 GPU
76 一些平台正在开发新的 I/O 总线或对 PCIE 的添加/修改以解决其中一些限制
/linux-5.19.10/arch/arm/boot/dts/ !
Dimx6qdl-mba6.dtsi94 /* PCIE.PWR_EN */
438 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */
439 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */
440 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */
468 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */
Daspeed-bmc-tyan-s7106.dts360 * - 0,0: PCIE slot 1, SMB #1
361 * - 0,1: PCIE slot 1, SMB #2
362 * - 1,0: PCIE slot 2, SMB #1
363 * - 1,1: PCIE slot 2, SMB #2
/linux-5.19.10/Documentation/devicetree/bindings/phy/ !
Dxlnx,zynqmp-psgtr.yaml14 GTR provides four lanes and is used by USB, SATA, PCIE, Display port and
36 maximum: 3 # for PCIE or SGMII
Drockchip-pcie-phy.txt1 Rockchip PCIE PHY
Damlogic,meson-axg-pcie.yaml7 title: Amlogic AXG PCIE PHY
Damlogic,meson-g12a-usb3-pcie-phy.yaml8 title: Amlogic G12A USB3 + PCIE Combo PHY
Damlogic,meson-axg-mipi-pcie-analog.yaml7 title: Amlogic AXG shared MIPI/PCIE analog PHY
/linux-5.19.10/Documentation/devicetree/bindings/pci/ !
Damlogic,meson-pcie.txt1 Amlogic Meson AXG DWC PCIE SoC controller
32 - phys: should contain a phandle to the PCIE phy
/linux-5.19.10/drivers/perf/hisilicon/ !
DKconfig10 tristate "HiSilicon PCIE PERF PMU"
/linux-5.19.10/arch/arm64/boot/dts/xilinx/ !
Dzynqmp-zcu102-revA.dts239 output-low; /* PCIE = 0, DP = 1 */
245 output-high; /* PCIE = 0, DP = 1 */
251 output-high; /* PCIE = 0, USB0 = 1 */
257 output-high; /* PCIE = 0, SATA = 1 */
545 /* refclk4 for PS-GT, used for PCIE slot */
550 /* refclk5 for PS-GT, used for PCIE */

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