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Searched refs:PCH_DREF_CONTROL (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/i915/display/
Dintel_pch_refclk.c526 val = intel_de_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
586 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
587 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
605 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
606 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
616 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
617 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
630 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
631 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
Dintel_dpll_mgr.c474 val = intel_de_read(dev_priv, PCH_DREF_CONTROL); in ibx_assert_pch_refclk_enabled()
Dintel_display.c2897 PCH_DREF_CONTROL) & in intel_panel_sanitize_ssc()
/linux-5.19.10/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c376 MMIO_D(PCH_DREF_CONTROL); in iterate_generic_mmio()
Di915_reg.h6176 #define PCH_DREF_CONTROL _MMIO(0xC6200) macro