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Searched refs:PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h6973 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x00000003 macro
Dgfx_7_2_sh_mask.h5742 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
Dgfx_8_0_sh_mask.h6530 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
Dgfx_8_1_sh_mask.h7064 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16931 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_9_1_sh_mask.h18240 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_9_2_1_sh_mask.h18117 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_9_4_2_sh_mask.h10364 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_11_0_0_sh_mask.h22132 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_10_1_0_sh_mask.h24305 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
Dgc_10_3_0_sh_mask.h22563 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro