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Searched refs:PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_sh_mask.h7949 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK 0x2 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h2051 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_9_1_sh_mask.h1907 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_9_2_1_sh_mask.h1922 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_9_4_2_sh_mask.h15447 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_11_0_0_sh_mask.h24328 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_10_1_0_sh_mask.h7629 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro
Dgc_10_3_0_sh_mask.h7950 #define PA_SC_DSM_CNTL__FORCE_EOV_REZ_1_MASK … macro