Searched refs:OWL_EMAC_OFF_MAC_CTRL_SSDC (Results 1 – 2 of 2) sorted by relevance
173 #define OWL_EMAC_OFF_MAC_CTRL_SSDC 4 /* SMII SYNC delay cycle */ macro
986 val = 0x04 << OWL_EMAC_OFF_MAC_CTRL_SSDC; in owl_emac_core_sw_reset()