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Searched refs:NUM_DISPCLK_DPM_LEVELS (Results 1 – 17 of 17) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu13_driver_if_v13_0_5.h44 #define NUM_DISPCLK_DPM_LEVELS 4 macro
113 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Dsmu13_driver_if_yellow_carp.h104 #define NUM_DISPCLK_DPM_LEVELS 8 macro
123 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Dsmu13_driver_if_v13_0_4.h105 #define NUM_DISPCLK_DPM_LEVELS 8 macro
124 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Dsmu11_driver_if_vangogh.h104 #define NUM_DISPCLK_DPM_LEVELS 7 macro
129 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Dsmu11_driver_if_navi10.h43 #define NUM_DISPCLK_DPM_LEVELS 8 macro
57 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
590 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
Dsmu11_driver_if_sienna_cichlid.h42 #define NUM_DISPCLK_DPM_LEVELS 8 macro
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
686 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
1045 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
Dsmu13_driver_if_v13_0_0.h39 #define NUM_DISPCLK_DPM_LEVELS 8 macro
1010 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
1330 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
Dsmu13_driver_if_v13_0_7.h38 #define NUM_DISPCLK_DPM_LEVELS 8 macro
1032 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
1353 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ]; // In MHz
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_smu.h33 #define NUM_DISPCLK_DPM_LEVELS 4 macro
71 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Ddcn315_clk_mgr.c522 …table.entries[i].dispclk_mhz = find_max_clk_value(clock_table->DispClocks, NUM_DISPCLK_DPM_LEVELS); in dcn315_clk_mgr_helper_populate_bw_params()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_smu.h33 #define NUM_DISPCLK_DPM_LEVELS 8 macro
79 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Ddcn316_clk_mgr.c519 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn316_clk_mgr_helper_populate_bw_params()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.h106 #define NUM_DISPCLK_DPM_LEVELS 8 macro
132 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS];
Ddcn31_clk_mgr.c577 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn31_clk_mgr_helper_populate_bw_params()
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/
Dsmu9_driver_if.h43 #define NUM_DISPCLK_DPM_LEVELS 8 macro
56 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
314 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ];
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu11_driver_if.h45 #define NUM_DISPCLK_DPM_LEVELS 8 macro
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
427 uint16_t FreqTableDispclk [NUM_DISPCLK_DPM_LEVELS ];
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega20_processpptables.c345 for (i = 0; i < NUM_DISPCLK_DPM_LEVELS; i++)