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Searched refs:NR_IRQS_LEGACY (Results 1 – 25 of 32) sorted by relevance

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/linux-5.19.10/arch/arm/mach-omap1/
Dirqs.h22 #define INT_CAMERA (NR_IRQS_LEGACY + 1)
23 #define INT_FIQ (NR_IRQS_LEGACY + 3)
24 #define INT_RTDX (NR_IRQS_LEGACY + 6)
25 #define INT_DSP_MMU_ABORT (NR_IRQS_LEGACY + 7)
26 #define INT_HOST (NR_IRQS_LEGACY + 8)
27 #define INT_ABORT (NR_IRQS_LEGACY + 9)
28 #define INT_BRIDGE_PRIV (NR_IRQS_LEGACY + 13)
29 #define INT_GPIO_BANK1 (NR_IRQS_LEGACY + 14)
30 #define INT_UART3 (NR_IRQS_LEGACY + 15)
31 #define INT_TIMER3 (NR_IRQS_LEGACY + 16)
[all …]
Dams-delta-fiq.c159 ((INT_DEFERRED_FIQ - NR_IRQS_LEGACY) & 0x1f) * 0x4; in ams_delta_init_fiq()
199 offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4; in ams_delta_init_fiq()
Dirq.c234 omap_l2_irq -= NR_IRQS_LEGACY; in omap1_init_irq()
Dams-delta-fiq-handler.S107 cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
/linux-5.19.10/arch/arm/mach-imx/
Dmx2x.h59 #define MX2x_INT_CSPI3 (NR_IRQS_LEGACY + 6)
60 #define MX2x_INT_GPIO (NR_IRQS_LEGACY + 8)
61 #define MX2x_INT_SDHC2 (NR_IRQS_LEGACY + 10)
62 #define MX2x_INT_SDHC1 (NR_IRQS_LEGACY + 11)
63 #define MX2x_INT_I2C (NR_IRQS_LEGACY + 12)
64 #define MX2x_INT_SSI2 (NR_IRQS_LEGACY + 13)
65 #define MX2x_INT_SSI1 (NR_IRQS_LEGACY + 14)
66 #define MX2x_INT_CSPI2 (NR_IRQS_LEGACY + 15)
67 #define MX2x_INT_CSPI1 (NR_IRQS_LEGACY + 16)
68 #define MX2x_INT_UART4 (NR_IRQS_LEGACY + 17)
[all …]
Dmx3x.h143 #define MX3x_INT_I2C3 (NR_IRQS_LEGACY + 3)
144 #define MX3x_INT_I2C2 (NR_IRQS_LEGACY + 4)
145 #define MX3x_INT_RTIC (NR_IRQS_LEGACY + 6)
146 #define MX3x_INT_I2C (NR_IRQS_LEGACY + 10)
147 #define MX3x_INT_CSPI2 (NR_IRQS_LEGACY + 13)
148 #define MX3x_INT_CSPI1 (NR_IRQS_LEGACY + 14)
149 #define MX3x_INT_ATA (NR_IRQS_LEGACY + 15)
150 #define MX3x_INT_UART3 (NR_IRQS_LEGACY + 18)
151 #define MX3x_INT_IIM (NR_IRQS_LEGACY + 19)
152 #define MX3x_INT_RNGA (NR_IRQS_LEGACY + 22)
[all …]
/linux-5.19.10/arch/mips/include/asm/mach-loongson64/
Dirq.h6 #define NR_IRQS_LEGACY 16 macro
9 #define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256)
11 #define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY
/linux-5.19.10/arch/arm/include/asm/
Dirq.h5 #define NR_IRQS_LEGACY 16 macro
10 #define NR_IRQS NR_IRQS_LEGACY
42 return NR_IRQS_LEGACY; in nr_legacy_irqs()
/linux-5.19.10/tools/arch/x86/include/asm/
Dirq_vectors.h131 #define NR_IRQS_LEGACY 16 macro
146 #define NR_IRQS NR_IRQS_LEGACY
/linux-5.19.10/arch/x86/include/asm/
Dirq_vectors.h131 #define NR_IRQS_LEGACY 16 macro
146 #define NR_IRQS NR_IRQS_LEGACY
Dio_apic.h125 #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
185 #define gsi_top (NR_IRQS_LEGACY)
/linux-5.19.10/arch/powerpc/include/asm/
Dirq.h26 #define NR_IRQS_LEGACY 16 macro
/linux-5.19.10/arch/s390/include/asm/
Dirq.h12 #define NR_IRQS_LEGACY NR_IRQS_BASE macro
/linux-5.19.10/drivers/clk/imx/
Dclk-imx1.c20 #define MX1_TIM1_INT (NR_IRQS_LEGACY + 59)
Dclk-imx31.c21 #define MX31_INT_GPT (NR_IRQS_LEGACY + 29)
Dclk-imx27.c18 #define MX27_INT_GPT1 (NR_IRQS_LEGACY + 26)
/linux-5.19.10/arch/arm/mach-pxa/
Dirqs.h15 #define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
/linux-5.19.10/arch/loongarch/include/asm/
Dirq.h43 #define NR_IRQS_LEGACY 16 macro
/linux-5.19.10/arch/powerpc/sysdev/
Di8259.c263 i8259_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0, in i8259_init()
Dtsi108_pci.c408 pci_irq_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0, in tsi108_pci_int_init()
/linux-5.19.10/arch/x86/kernel/
Di8259.c411 .nr_legacy_irqs = NR_IRQS_LEGACY,
/linux-5.19.10/include/linux/
Domap-dma.h19 #define INT_DMA_LCD (NR_IRQS_LEGACY + 25)
Dirq.h596 #ifndef NR_IRQS_LEGACY
597 # define NR_IRQS_LEGACY 0 macro
/linux-5.19.10/arch/x86/kernel/acpi/
Dboot.c105 static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
413 if (bus_irq >= NR_IRQS_LEGACY) { in mp_override_legacy_irq()
545 if (bus_irq < NR_IRQS_LEGACY) in acpi_sci_ioapic_setup()
/linux-5.19.10/arch/powerpc/sysdev/xics/
Dxics-common.c205 if (virq < NR_IRQS_LEGACY) in xics_migrate_irqs_away()

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