Home
last modified time | relevance | path

Searched refs:M_SCD_TRACE_CFG_RESET (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/arch/mips/sibyte/common/
Dbus_watcher.c168 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
221 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bus_watcher()
Dsb_tbprof.c180 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in arm_tb()
221 __raw_writeq(M_SCD_TRACE_CFG_RESET, in sbprof_tb_intr()
232 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sbprof_tb_intr()
/linux-5.19.10/arch/mips/include/asm/sibyte/
Dsb1250_scd.h507 #define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) macro