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Searched refs:MX35_CCM_CGR2 (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/clk/imx/
Dclk-imx35.c30 #define MX35_CCM_CGR2 0x34 macro
199 clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MX35_CCM_CGR2, 0); in _mx35_clocks_init()
200 clk[rtic_gate] = imx_clk_gate2("rtic_gate", "ahb", base + MX35_CCM_CGR2, 2); in _mx35_clocks_init()
201 clk[scc_gate] = imx_clk_gate2("scc_gate", "ipg", base + MX35_CCM_CGR2, 4); in _mx35_clocks_init()
202 clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ahb", base + MX35_CCM_CGR2, 6); in _mx35_clocks_init()
203 clk[spba_gate] = imx_clk_gate2("spba_gate", "ipg", base + MX35_CCM_CGR2, 8); in _mx35_clocks_init()
204 clk[spdif_gate] = imx_clk_gate2("spdif_gate", "spdif_div_post", base + MX35_CCM_CGR2, 10); in _mx35_clocks_init()
205 clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "ssi1_div_post", base + MX35_CCM_CGR2, 12); in _mx35_clocks_init()
206 clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "ssi2_div_post", base + MX35_CCM_CGR2, 14); in _mx35_clocks_init()
207 clk[uart1_gate] = imx_clk_gate2("uart1_gate", "uart_div", base + MX35_CCM_CGR2, 16); in _mx35_clocks_init()
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/linux-5.19.10/arch/arm/mach-imx/
Dcrmregs-imx3.h40 #define MX35_CCM_CGR2 0x34 macro