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/linux-5.19.10/sound/soc/fsl/
DKconfig146 for the ARM i.MX CPUs.
158 tristate "SoC Audio for Freescale i.MX CPUs"
162 the i.MX CPUs.
258 comment "SoC Audio support for Freescale i.MX boards:"
272 tristate "SoC Audio support for i.MX boards with the ES8328 codec"
284 tristate "SoC Audio support for i.MX boards with sgtl5000"
291 Say Y if you want to add support for SoC audio on an i.MX board with
295 tristate "SoC Audio support for i.MX boards with S/PDIF"
299 SoC Audio support for i.MX boards with S/PDIF
300 Say Y if you want to add support for SoC audio on an i.MX board with
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/sound/
Dimx-audio-sgtl5000.txt1 Freescale i.MX audio complex with SGTL5000 codec
9 - ssi-controller : The phandle of the i.MX SSI controller
35 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
37 - mux-ext-port : The external port of the i.MX audio muxer
Dimx-audio-es8328.txt1 Freescale i.MX audio complex with ES8328 codec
6 - ssi-controller : The phandle of the i.MX SSI controller
34 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
35 - mux-ext-port : The external port of the i.MX audio muxer (AUDMIX)
Deukrea-tlv320.txt11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
Dimx-audio-spdif.txt1 Freescale i.MX audio complex with S/PDIF transceiver
9 - spdif-controller : The phandle of the i.MX S/PDIF controller
/linux-5.19.10/drivers/staging/fbtft/
Dfb_s6d02a1.c112 #define MX BIT(6) macro
127 MX | MY | (par->bgr << 3)); in set_var()
139 MX | MV | (par->bgr << 3)); in set_var()
Dfb_st7735r.c98 #define MX BIT(6) macro
112 MX | MY | (par->bgr << 3)); in set_var()
124 MX | MV | (par->bgr << 3)); in set_var()
Dfb_hx8340bn.c121 #define MX BIT(6) in set_var() macro
129 MX | MV | (par->bgr << 3)); in set_var()
133 MX | MY | (par->bgr << 3)); in set_var()
/linux-5.19.10/Documentation/devicetree/bindings/media/
Dimx.txt1 Freescale i.MX Media Video Device
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
30 addition this device consists of an i.MX-specific "CSI2IPU gasket"
34 to the i.MX IPU CSIs.
/linux-5.19.10/drivers/gpu/drm/imx/
DKconfig3 tristate "DRM Support for Freescale i.MX"
11 enable i.MX graphics support
38 tristate "Freescale i.MX DRM HDMI"
/linux-5.19.10/drivers/interconnect/imx/
DKconfig2 tristate "i.MX interconnect drivers"
5 Generic interconnect drivers for i.MX SOCs
/linux-5.19.10/Documentation/devicetree/bindings/display/imx/
Dfsl-imx-drm.txt1 Freescale i.MX DRM master device
4 The freescale i.MX DRM master device is a virtual device needed to list all
20 Freescale i.MX IPUv3
62 Freescale i.MX PRE (Prefetch Resolve Engine)
88 Freescale i.MX PRG (Prefetch Resolve Gasket)
/linux-5.19.10/drivers/soc/imx/
DKconfig2 menu "i.MX SoC drivers"
5 bool "i.MX GPCv2 PM domains"
/linux-5.19.10/drivers/gpu/drm/mxsfb/
DKconfig8 tristate "i.MX (e)LCDIF LCD controller"
18 Those devices are found in various i.MX SoC (including i.MX23,
/linux-5.19.10/Documentation/devicetree/bindings/cpufreq/
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
4 Certain i.MX SoCs support different OPPs depending on the "market segment" and
/linux-5.19.10/sound/soc/sof/imx/
DKconfig4 bool "SOF support for NXP i.MX audio DSPs"
8 This adds support for Sound Open Firmware for NXP i.MX platforms.
/linux-5.19.10/drivers/media/platform/nxp/
DKconfig33 tristate "NXP i.MX Pixel Pipeline (PXP)"
39 The i.MX Pixel Pipeline is a memory-to-memory engine for scaling,
/linux-5.19.10/Documentation/devicetree/bindings/ata/
Dimx-sata.yaml7 title: Freescale i.MX AHCI SATA Controller
13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
Dimx-pata.txt1 * Freescale i.MX PATA Controller
/linux-5.19.10/Documentation/devicetree/bindings/display/
Dfsl,lcdif.yaml7 title: Freescale/NXP i.MX LCD Interface (LCDIF)
14 (e)LCDIF display controller found in the Freescale/NXP i.MX SoCs.
/linux-5.19.10/Documentation/xtensa/
Datomctl.rst25 For systems without an coherent cache controller, non-MX, we always
26 use the memory controllers RCW, thought non-MX controlers likely
/linux-5.19.10/Documentation/devicetree/bindings/interconnect/
Dfsl,imx8m-noc.yaml7 title: Generic i.MX bus frequency device
13 The i.MX SoC family has multiple buses for which clock frequency (and
/linux-5.19.10/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/
Darcx,anybus-controller.txt50 This example places the bridge on top of the i.MX WEIM parallel bus, see:
60 /* fsl,weim-cs-timing is a i.MX WEIM bus specific property */
/linux-5.19.10/Documentation/devicetree/bindings/interrupt-controller/
Dcdns,xtensa-mx.txt1 * Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)
/linux-5.19.10/Documentation/w1/masters/
Dmxc-w1.rst7 * Freescale MX27, MX31 and probably other i.MX SoCs

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