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Searched refs:MSR_P4_ITLB_ESCR1 (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/arch/x86/events/intel/
Dp4.c95 .escr_msr = { MSR_P4_ITLB_ESCR0, MSR_P4_ITLB_ESCR1 },
1166 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ITLB_ESCR1),
/linux-5.19.10/tools/arch/x86/include/asm/
Dmsr-index.h958 #define MSR_P4_ITLB_ESCR1 0x000003b7 macro
/linux-5.19.10/arch/x86/include/asm/
Dmsr-index.h958 #define MSR_P4_ITLB_ESCR1 0x000003b7 macro